Wafer foundry leading Taiwan Semiconductor Manufacturing Co., Ltd. advanced process and new products launched! According to foreign technology media "anandtech", TSMC has quietly introduced a performance-enhancing version of the 7-nm deep-UV DUV (N7) and 5-nanometer EUV (N5) processes. The two generations, called N7P and N5P process technology, are designed for customers who need 7nm design calculations faster or consume less power.
The report pointed out that TSMC's new N7P process technology uses the same design rules as the N7, but the optimized front end (FEOL) and mid-range (MOL) architecture can increase performance by 7% at the same power consumption, or at the same performance frequency. Reduce energy consumption by 10%.
The new N7P process technology, TSMC first revealed the relevant information at the VLSI seminar held in Japan this year, but it was not widely publicized. N7P currently uses proven deep ultraviolet (DUV) lithography, which does not change the transistor density compared to N7 process technology. For customers who require a transistor density of approximately 18% to 20%, TSMC is expected to recommend N7+ or N6 process technology. N6 process technology is a multi-layer wafer process using extreme ultraviolet (EUV) lithography.
The report further pointed out that in addition to N7P's new process technology, TSMC's next major process node with significant transistor density enhancement, improved power consumption and performance is the 5 nm N5 process technology. TSMC has provided a performance-enhanced version of the N5P, which uses FEOL and MOL optimization to increase the chip's operating speed by 7% at the same power or 15% at the same frequency.
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