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Home > News > Manufacturer News > TSMC 7nm EUV chip successfully released for the first time 5nm trial production next year


TSMC 7nm EUV chip successfully released for the first time 5nm trial production next year

Wednesday,Oct 10,2018

TSMC, the world's No. 1 foundry, announced two major breakthroughs in extreme ultraviolet lithography (EUV) technology. The first is to use the 7nm EUV process to complete the customer chip flow, and the second is the 5nm process will be in April 2019. Start trial production. Beginning in April this year, TSMC's first-generation 7nm process (CLN7FF/N7) was put into mass production. Apple A12, Huawei Kirin 980, Qualcomm "Zhenlong 855", AMD next generation Ruilong / Xiaolong and other processors are all or will be It is made using it, but traditional deep ultraviolet lithography (DUV) technology is still used.


The next second-generation 7nm process (CLNFF+/N7+), TSMC will use EUV for the first time, but only four non-critical layers to reduce risk and accelerate production, and also master the ASML new lithography machine Twinscan NXE .

The specific improvement of the 7nm EVU compared to the 7nm DUV has not been announced. TSMC only says that it can increase the transistor density by 20%, and the power consumption can be reduced by 6-12% at the same frequency.

Now successfully completed the flow film on the 7nm EUV process, which proves the reliability and maturity of the new process and new technology, which lays a solid foundation for subsequent mass production.

TSMC did not disclose which chip the successful chip was from, but it is not difficult to guess the cooperation between TSMC and TSMC.

After 7nm, TSMC's next stop will be 5nm (CLN5FF/N5), which will apply EUV on as many as 14 layers, which is the first full-scale popularization. It claims to increase the transistor density by 80% compared with the original 7nm process transistor, thus reducing the chip area by 45%. It can increase the frequency of power consumption by 15% and the power consumption of the same frequency by 20%.

In April 2019, TSMC's 5nm EUV process will begin trial production, and mass production is expected to begin in the second quarter of 2020, just to meet the flagship new platforms at the end of the year.

The EDA design tool for TSMC's 5nm process will be available in November of this year, so some customers should have begun to develop chips based on new processes.

With the rapid complication of semiconductor processes, not only the cost of developing new mass production processes has increased significantly, but the development of corresponding chips has become more and more expensive. Currently, it is estimated to cost an average of $150 million, and the 5 nm era may cost $2-250 million.

PS: Intel's autumn desktop platform is still 14nm, and the long-delayed 10nm will not be mass-produced until next year. 7nm is nowhere in sight, not to mention 5nm.