To suit complex application and cost requirements, manufacturers are adopting popular process nodes to adapt to market demand; the usage of higher technology and more efficient architecture is a powerful ways to increase competitiveness.
In terms of the latest lower process,
Xilinx chose TSMC 16nm; Altera announced cooperation with Intel 14nm. For the 16nm node, Xilinx and TSMC jointly announced to start a special program called “FinFast”, leveraging TSMC’s advanced technology to create the highest performance FPGA devices with fastest speed to market.
Both sides input necessary resources to form a dedicated team to optimize FinFET technology and Xilinx UltraScale architecture. On the basis of the plan, 16FinFET test chip is expected to be released in the late 2016; and the first on-site system SoC FPGA products will come to market by 2014.
Altera is also right behind, declaring to corporate with Intel 14nm Tri-Gate process; and introduce 14nm SoC FPGA test chip before the end of 2013. It is projected that 14nm Soc FPGA will start production in 2014.
Technology competition continues. It is said that planar process falls into bottleneck in the 20nm node, due to the power consumption. But the coming of 3D IC、14nm Tri-Gate、16nmFinFET technologies certainly benefits FPGA manufacturers. As such, these two companies are foraying into 20nm, 16/14nm, even 10nm, despite the existing 28nm FPGA.
On the side of product architecture, Altera leans toward ARM to create SoC FPGA architecture; while Xilinx released ASIC-level programmable architecture UltraScale. The latter will not be limited into previous FPGA industry, but face broader PLD+ASIC market. This movement is revolutionary, which will accelerate partitioning market shares of embedded systems by ASIC, ASSP, and DSP vendors.
Tags：
SoC FPGA , technology race, process race, Xilinx, Altera